Simple SNES shoot-'em-up game.
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260 lines
7.0 KiB

9 years ago
  1. ;------------------------------------------------------------------------
  2. ;- Standard SNES initialization routine, by Neviksti
  3. ;------------------------------------------------------------------------
  4. ;----------------------------------------------------------------------------
  5. ; InitSNES -- my "standard" initialization of SNES memory and registers
  6. ;----------------------------------------------------------------------------
  7. .MACRO InitSNES
  8. sei ;disable interrupts
  9. clc ;switch to native mode
  10. xce
  11. REP #$38 ; mem/A = 16 bit, X/Y = 16 bit
  12. ;decimal mode off
  13. LDX #$1FFF ;Setup the stack
  14. TXS ;Transfer Index X to Stack Pointer Register
  15. ;do the rest of the initialization in a routine
  16. JSL $008000
  17. SEP #$20 ; mem/A = 8 bit
  18. .ENDM
  19. ;----------------------------------------------------------------------------
  20. .BANK 0 SLOT 0
  21. .ORG 0
  22. .SECTION "InitializeSNESCode" FORCE
  23. InitializeSNES:
  24. PHK ;set Data Bank = Program Bank
  25. PLB
  26. LDA #$0000 ;set Direct Page = $0000
  27. TCD ;Transfer Accumulator to Direct Register
  28. LDX $1FFD ;we clear all the mem at one point ...
  29. STX $4372 ;so save the return address in a place that won't get overwritten
  30. LDX $1FFF
  31. STX $4374
  32. SEP #$20 ; mem/A = 8 bit
  33. REP #$10
  34. LDA #$8F
  35. STA $2100 ;turn screen off for now, set brightness to normal
  36. LDX #$2101
  37. _Loop00: ;regs $2101-$210C
  38. STZ $00,X ;set Sprite,Character,Tile sizes to lowest, and set addresses to $0000
  39. INX
  40. CPX #$210D
  41. BNE _Loop00
  42. _Loop01: ;regs $210D-$2114
  43. STZ $00,X ;Set all BG scroll values to $0000
  44. STZ $00,X
  45. INX
  46. CPX #$2115
  47. BNE _Loop01
  48. LDA #$80 ;reg $2115
  49. STA $2115 ; Initialize VRAM transfer mode to word-access, increment by 1
  50. STZ $2116 ;regs $2117-$2117
  51. STZ $2117 ;VRAM address = $0000
  52. ;reg $2118-$2119
  53. ;VRAM write register... don't need to initialize
  54. STZ $211A ;clear Mode7 setting
  55. LDX #$211B
  56. _Loop02: ;regs $211B-$2120
  57. STZ $00,X ;clear out the Mode7 matrix values
  58. STZ $00,X
  59. INX
  60. CPX #$2121
  61. BNE _Loop02
  62. ;reg $2121 - Color address, doesn't need initilaizing
  63. ;reg $2122 - Color data, is initialized later
  64. LDX #$2123
  65. _Loop03: ;regs $2123-$2133
  66. STZ $00,X ;turn off windows, main screens, sub screens, color addition,
  67. INX ;fixed color = $00, no super-impose (external synchronization),
  68. CPX #$2134 ;no interlaced mode, normal resolution
  69. BNE _Loop03
  70. ;regs $2134-$2136 - multiplication result, no initialization needed
  71. ;reg $2137 - software H/V latch, no initialization needed
  72. ;reg $2138 - Sprite data read, no initialization needed
  73. ;regs $2139-$213A - VRAM data read, no initialization needed
  74. ;reg $213B - Color RAM data read, no initialization needed
  75. ;regs $213C-$213D - H/V latched data read, no initialization needed
  76. STZ $213E ;reg $213E - might not be necesary, but selects PPU master/slave mode
  77. ;reg $213F - PPU status flag, no initialization needed
  78. ;reg $2140-$2143 - APU communication regs, no initialization required
  79. ;reg $2180 - read/write WRAM register, no initialization required
  80. ;reg $2181-$2183 - WRAM address, no initialization required
  81. ;reg $4016-$4017 - serial JoyPad read registers, no need to initialize
  82. STZ $4200 ;reg $4200 - disable timers, NMI,and auto-joyread
  83. LDA #$FF
  84. STA $4201 ;reg $4201 - programmable I/O write port, initalize to allow reading at in-port
  85. ;regs $4202-$4203 - multiplication registers, no initialization required
  86. ;regs $4204-$4206 - division registers, no initialization required
  87. ;regs $4207-$4208 - Horizontal-IRQ timer setting, since we disabled this, it is OK to not init
  88. ;regs $4209-$420A - Vertical-IRQ timer setting, since we disabled this, it is OK to not init
  89. STZ $420B ;reg $420B - turn off all general DMA channels
  90. STZ $420C ;reg $420C - turn off all H-MA channels
  91. STZ $420D ;reg $420D - ROM access time to slow (2.68Mhz)
  92. LDA $4210 ;reg $4210 - NMI status, reading resets
  93. ;reg $4211 - IRQ status, no need to initialize
  94. ;reg $4212 - H/V blank and JoyRead status, no need to initialize
  95. ;reg $4213 - programmable I/O inport, no need to initialize
  96. ;reg $4214-$4215 - divide results, no need to initialize
  97. ;reg $4216-$4217 - multiplication or remainder results, no need to initialize
  98. ;regs $4218-$421f - JoyPad read registers, no need to initialize
  99. ;regs $4300-$437F
  100. ;no need to intialize because DMA was disabled above
  101. ;also, we're not sure what all of the registers do, so it is better to leave them at
  102. ;their reset state value
  103. JSR ClearVRAM ;Reset VRAM
  104. JSR ClearPalette ;Reset colors
  105. ;**** clear Sprite tables ********
  106. STZ $2102 ;sprites initialized to be off the screen, palette 0, character 0
  107. STZ $2103
  108. LDX #$0080
  109. LDA #$F0
  110. _Loop08:
  111. STA $2104 ;set X = 240
  112. STA $2104 ;set Y = 240
  113. STZ $2104 ;set character = $00
  114. STZ $2104 ;set priority=0, no flips
  115. DEX
  116. BNE _Loop08
  117. LDX #$0020
  118. _Loop09:
  119. STZ $2104 ;set size bit=0, x MSB = 0
  120. DEX
  121. BNE _Loop09
  122. ;**** clear WRAM ********
  123. STZ $2181 ;set WRAM address to $000000
  124. STZ $2182
  125. STZ $2183
  126. LDX #$8008
  127. STX $4300 ;Set DMA mode to fixed source, BYTE to $2180
  128. LDX #wram_fill_byte
  129. STX $4302 ;Set source offset
  130. LDA #:wram_fill_byte
  131. STA $4304 ;Set source bank
  132. LDX #$0000
  133. STX $4305 ;Set transfer size to 64k bytes
  134. LDA #$01
  135. STA $420B ;Initiate transfer
  136. LDA #$01 ;now set the next 64k bytes
  137. STA $420B ;Initiate transfer
  138. PHK ;make sure Data Bank = Program Bank
  139. PLB
  140. CLI ;enable interrupts again
  141. LDX $4372 ;get our return address...
  142. STX $1FFD
  143. LDA $4374
  144. STA $1FFF
  145. RTL
  146. wram_fill_byte:
  147. .db $00
  148. ;----------------------------------------------------------------------------
  149. ; ClearVRAM -- Sets every byte of VRAM to zero
  150. ; In: None
  151. ; Out: None
  152. ; Modifies: flags
  153. ;----------------------------------------------------------------------------
  154. ClearVRAM:
  155. pha
  156. phx
  157. php
  158. REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
  159. SEP #$20
  160. LDA #$80
  161. STA $2115 ;Set VRAM port to word access
  162. LDX #$1809
  163. STX $4300 ;Set DMA mode to fixed source, WORD to $2118/9
  164. LDX #$0000
  165. STX $2116 ;Set VRAM port address to $0000
  166. STX $0000 ;Set $00:0000 to $0000 (assumes scratchpad ram)
  167. STX $4302 ;Set source address to $xx:0000
  168. LDA #$00
  169. STA $4304 ;Set source bank to $00
  170. LDX #$FFFF
  171. STX $4305 ;Set transfer size to 64k-1 bytes
  172. LDA #$01
  173. STA $420B ;Initiate transfer
  174. STZ $2119 ;clear the last byte of the VRAM
  175. plp
  176. plx
  177. pla
  178. RTS
  179. ;----------------------------------------------------------------------------
  180. ; ClearPalette -- Reset all palette colors to zero
  181. ; In: None
  182. ; Out: None
  183. ; Modifies: flags
  184. ;----------------------------------------------------------------------------
  185. ClearPalette:
  186. PHX
  187. PHP
  188. REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
  189. SEP #$20
  190. STZ $2121
  191. LDX #$0100
  192. ClearPaletteLoop:
  193. STZ $2122
  194. STZ $2122
  195. DEX
  196. BNE ClearPaletteLoop
  197. PLP
  198. PLX
  199. RTS
  200. .ENDS